Chipmetrics

📢 Our CEO Mikko Utriainen and Head of Metrology Wafer Business Thomas Werner recently joined Alexander Türpe’s podcast to talk about deep tech entrepreneurship, scaling a startup, and what it's like building Chipmetrics across Finland and Germany. From founding stories to remote leadership, this episode offers an honest look behind the scenes of a fast-growing startup in the semiconductor industry. Check out the full episode from the link in the first comment 👇 #DeepTech #Semiconductors #Startups #Leadership #Chipmetrics #ALDep #Founders

📢 We’re excited to announce that our CEO, Dr. Mikko Utriainen, will give a presentation at the SMC Korea 2025 event! 🗓 Date: Wednesday, May 14, 2025 🕒 Time: 15:50–16:20 (Session 2: The Future of Semiconductor Materials) 📍 Venue: Convention Hall 2, 3F, Suwon Convention Center 🎤 Presentation Title: Advancing ALD Tool Qualification for 3D Memory Devices Using High-Aspect-Ratio Test Structures. As the semiconductor industry scales further into 3D memory architectures like 3D DRAM and NAND, ensuring ultra-thin film quality becomes increasingly critical. In this talk, Dr. Utriainen will highlight how our lateral high-aspect-ratio (LHAR) test structures enable sensitive ALD process monitoring and tool benchmarking, offering fabs a practical solution to improve process stability, yield, and tool-to-tool comparability. 🔬 Join us to explore how HAR metrology is reshaping ALD qualification for next-generation semiconductor manufacturing! 📩 Interested in learning more or discussing collaboration opportunities? Book a meeting with Mikko Utriainen during SMC Korea by sending an email to: 👉 info@chipmetrics.com We’d be happy to schedule a time that works for you! #SMC2025 #Semiconductor #ALDep #PillarHall #TestedWithPillarHall #Chipmetrified

🚨 You're Invited! 🚨 Chipmetrics is hosting an exclusive 3D Thin Film Metrology Workshop on June 26, 2025, right after the ALD/ALE Conference — and we hope to see you there! 📍 Location: Parnas Hotel, Jeju Island, South Korea 🗓 Date: June 26, 2025 Join researchers, engineers, and industry professionals for a full day of: ✅ Keynote presentations on 3D thin film process control ✅ Hands-on training with PillarHall® test chips ✅ Expert talks on conformality measurement challenges ✅ Roundtable discussions and valuable networking 🎟️ Seats are limited – register now from the link in the first comment 👇 #ALDep #PillarHall #ALDALE2025 #Chipmetrified #TestedWithPillarHall

🚀Accelerate your CMOS Image Sensor (CIS) development with smarter ALD process control! Atomic Layer Deposition (ALD) is critical in CIS manufacturing, but challenges like inconsistent thin-film coverage and slow optimization cycles can hinder progress. In our latest blog post, we show how the PillarHall® test chip helps to: ✅ Rapidly assess ALD conformality and step coverage ✅ Reduce process iteration time from months to days ✅ Improve sensor performance and time-to-market 📖 Read the full blog from the first link in the comment section 👇 #ALDep #CIS #TestedWithPillarHall #PillarHall #Chipmetrified #Semiconductor

PillarHall® test chips continue to prove their value in cutting-edge ALD research.🧪✨ In this insightful new blog post on AtomicLimits, our collaborators explore how PillarHall enables precise analysis of conformality in extreme high aspect ratio structures, supports understanding of diffusion and reaction regimes, and even study the influence of plasma ions on film growth. #ALDep #TestedWithPillarHall #PillarHall #Chipmetrified

We're excited to be part of ExciteLab Accelerator in Dresden! 🚀 A big thank you to the ExciteLab - A SpinLab Company team—looking forward to connecting with fellow innovators and pushing the boundaries together.

Great energy and inspiring discussions at the ASD 2025 Workshop in Leipzig! 🙌 Chipmetrics was represented by Jussi Kinnunen and Thomas Werner, who showcased our approach to accelerating Area-Selective Deposition (ASD) development with our unique test chips. It was a great opportunity to engage with leading researchers and industry experts, share knowledge, and highlight how Chipmetrics' solutions bring speed, precision, and insight to ASD process development. A big thank you to the organizers and everyone who visited our sessions! #ASDep #ALDep #ASD2025 #Chipmetrified

🚀 Driving Innovation in Semiconductors with Area Selective Deposition (ASD) 🚀 As semiconductor devices continue to scale down, precision in material deposition is more critical than ever. Area Selective Deposition (ASD) is revolutionizing the industry by enabling controlled material growth only in desired areas, enhancing device performance while reducing processing steps and costs. To support manufacturers in mastering ASD, Chipmetrics introduces the ASD-1 test chip—a cutting-edge tool designed for rapid process development and benchmarking. With sub-100 nm linewidth structures and alternating materials at the same surface level, ASD-1 provides unmatched accuracy for refining deposition selectivity. Beyond the chip, our ASD services simplify R&D and production with solutions like pocket wafer services for multiple wafer sizes, broad material compatibility, and insights into planar vs. elevated structure deposition. By combining the ASD-1 test chip with our specialized services, manufacturers can accelerate prototyping, improve process control, and optimize ASD for next-generation semiconductor devices. Discover how ASD-1 can transform your process development. Read more from the link in the first comment 👇 #ALDep #Semiconductors #ASD #Chipmetrified

We are excited to share our recent findings on the advanced process of area-selective deposition (ASD) for Co thin films at low temperatures – this Sunday through Wednesday (March 23–26) at Universität Leipzig’s ASD2025! We investigated a Co ALD process using CoCOhept as precursor at just 85°C, coupled with a hydrogen plasma to remove hydrocarbon ligands. Our test chips featured 100 nm SiO2/Si3N4 lines embedded in Si, where we observed partially selective Co deposition of up to 2 nm on Si –but no selectivity between SiO2 and Si3N4. What’s particularly noteworthy is that this fast, efficient analysis relied on AFM and advanced EDS – no cross-sectional imaging needed. If you’re curious about Co ASD behavior, especially at thicknesses below 10 nm for features well under 100 nm, don’t hesitate getting in touch so we can discuss how these findings can help refine processes and enable reliable, rapid film detection in next-gen semiconductor manufacturing. The research was conducted together with Fraunhofer ENAS and AlixLabs, with findings presented by our very own Thomas Werner. #ASD2025 #ALDep #Chipmetrified

🔎 Scaling ALD from Lab to Fab: Key Challenges & Solutions. As semiconductor devices evolve, 3D structures like 3D NAND, TSVs, and nanosheet transistors demand high aspect ratio ALD processes. But scaling ALD from research to industry isn’t straightforward. 🚧 Key challenges: ⚡ Lab vs. Fab Mismatch – Process behavior changes when scaling from research tools to high-volume manufacturing. ⚡ Throughput & Cost – Slow deposition rates can make processes too expensive for industrial adoption. ⚡ Defect Control – Even tiny particles can compromise yield, but many research labs lack advanced defect detection. ⚡ Test Structure Limitations – Access to sub-100 nm, high-aspect-ratio structures is restricted, making validation difficult. 🔬 PillarHall® Metrology Chips help overcome these challenges with aspect ratios up to 10,000:1, enabling fast, cost-effective ALD validation without cross-sections. 👇Read more from the link in the first comment. #ALDep #Chipmetrified #PillarHall #TestedWithPillarHall #Semiconductor