Chipmetrics

We're excited to be part of ExciteLab Accelerator in Dresden! 🚀 A big thank you to the ExciteLab - A SpinLab Company team—looking forward to connecting with fellow innovators and pushing the boundaries together.

Great energy and inspiring discussions at the ASD 2025 Workshop in Leipzig! 🙌 Chipmetrics was represented by Jussi Kinnunen and Thomas Werner, who showcased our approach to accelerating Area-Selective Deposition (ASD) development with our unique test chips. It was a great opportunity to engage with leading researchers and industry experts, share knowledge, and highlight how Chipmetrics' solutions bring speed, precision, and insight to ASD process development. A big thank you to the organizers and everyone who visited our sessions! #ASDep #ALDep #ASD2025 #Chipmetrified

🚀 Driving Innovation in Semiconductors with Area Selective Deposition (ASD) 🚀 As semiconductor devices continue to scale down, precision in material deposition is more critical than ever. Area Selective Deposition (ASD) is revolutionizing the industry by enabling controlled material growth only in desired areas, enhancing device performance while reducing processing steps and costs. To support manufacturers in mastering ASD, Chipmetrics introduces the ASD-1 test chip—a cutting-edge tool designed for rapid process development and benchmarking. With sub-100 nm linewidth structures and alternating materials at the same surface level, ASD-1 provides unmatched accuracy for refining deposition selectivity. Beyond the chip, our ASD services simplify R&D and production with solutions like pocket wafer services for multiple wafer sizes, broad material compatibility, and insights into planar vs. elevated structure deposition. By combining the ASD-1 test chip with our specialized services, manufacturers can accelerate prototyping, improve process control, and optimize ASD for next-generation semiconductor devices. Discover how ASD-1 can transform your process development. Read more from the link in the first comment 👇 #ALDep #Semiconductors #ASD #Chipmetrified

We are excited to share our recent findings on the advanced process of area-selective deposition (ASD) for Co thin films at low temperatures – this Sunday through Wednesday (March 23–26) at Universität Leipzig’s ASD2025! We investigated a Co ALD process using CoCOhept as precursor at just 85°C, coupled with a hydrogen plasma to remove hydrocarbon ligands. Our test chips featured 100 nm SiO2/Si3N4 lines embedded in Si, where we observed partially selective Co deposition of up to 2 nm on Si –but no selectivity between SiO2 and Si3N4. What’s particularly noteworthy is that this fast, efficient analysis relied on AFM and advanced EDS – no cross-sectional imaging needed. If you’re curious about Co ASD behavior, especially at thicknesses below 10 nm for features well under 100 nm, don’t hesitate getting in touch so we can discuss how these findings can help refine processes and enable reliable, rapid film detection in next-gen semiconductor manufacturing. The research was conducted together with Fraunhofer ENAS and AlixLabs, with findings presented by our very own Thomas Werner. #ASD2025 #ALDep #Chipmetrified

🔎 Scaling ALD from Lab to Fab: Key Challenges & Solutions. As semiconductor devices evolve, 3D structures like 3D NAND, TSVs, and nanosheet transistors demand high aspect ratio ALD processes. But scaling ALD from research to industry isn’t straightforward. 🚧 Key challenges: ⚡ Lab vs. Fab Mismatch – Process behavior changes when scaling from research tools to high-volume manufacturing. ⚡ Throughput & Cost – Slow deposition rates can make processes too expensive for industrial adoption. ⚡ Defect Control – Even tiny particles can compromise yield, but many research labs lack advanced defect detection. ⚡ Test Structure Limitations – Access to sub-100 nm, high-aspect-ratio structures is restricted, making validation difficult. 🔬 PillarHall® Metrology Chips help overcome these challenges with aspect ratios up to 10,000:1, enabling fast, cost-effective ALD validation without cross-sections. 👇Read more from the link in the first comment. #ALDep #Chipmetrified #PillarHall #TestedWithPillarHall #Semiconductor

📢 At ALD for Industry in Dresden this week: our friends at ENCAPSULIX will present how the PillarHall test chips help it deposit decorative coatings in luxury goods. Make sure to check out the presentation by Jacques Kools, held on March 12th, 14:50,during Session 6 on Efficiency and Throughput Optimization. #ALDep #PillarHall #TestedWithPillarHall #Chipmetrified

🚀 Stay ahead of the competition with faster and more efficient tool qualification! The PillarHall series of test chips is designed to accelerate tool qualification, reduce costs, and help you get new tools up and running quickly—whether they’re brand new or freshly maintained. By offering objective, unbiased data and early detection of process shifts, PillarHall test chips help streamline your qualification cycles, empower procurement decisions, and reduce waste—boosting both productivity and sustainability. Plus, with high aspect ratio features designed for advanced nodes, you’ll be ready for tomorrow's technologies. Read the full article from the link in the first comment 👇 #ALDep #ALD #TestedWithPillarHall #PillarHall #Chipmetrified

🚀 Chipmetrics at ALD for Industry & Namlab High K Workshop 2025! 🚀 Chipmetrics is participating in two exciting events this March! 🔬 ALD for Industry (March 11-12, 2025, Dresden, Germany) We will be attending the event where we will present our latest research on the elemental composition of ALD films as a function of penetration depth. The study includes investigations into the La-doped HfO2 process and the unique characteristics of ferroelectric HfO2 films. Additionally, we will showcase how the PillarHall method successfully extends advanced surface analysis to 3D structures. This research is the result of a fantastic collaboration with Dr. Jennifer S. Emara, Dr. Nora Haufe, and the Fraunhofer Institute for Photonic Microsystems IPMS team. 🎤 Namlab High K Workshop 2025 (March 12-13, 2025, IFW Dresden) We will also be participating in the Namlab High K Workshop, where we’ll be networking with industry leaders and discussing our latest developments. 📍 If you are attending come visit us at both events to learn more about our cutting-edge solutions for 3D thin film characterization challenges! #ALDep #ThinFilms #TestedWithPillarHall #PillarHall #Chipmetrified

As device nodes keep shrinking, the race to seamlessly fill nanometer-scale features is on. Traditional atomic layer deposition (ALD) provides excellent precision, but doesn’t achieve the “V-shaped” coverage needed for super conformal films. A Linköping University team led by Professor Henrik Pedersen explored a new solution: adding a heavy inert gas–like krypton–to enhance diffusion on our PillarHall test chips. In tests, introducing krypton (Kr)increased the step coverage in high-aspect-ratio (18:1) features from 1 to 1.6 for aluminum nitride (AlN) deposition. The results show that the heavier Kr helps push lighter ammonia (NH3)molecules deeper into trenches, improving coverage at the bottom and reducing growth at the opening. While more research is needed to fully understand Kr’s role, this strategy could apply broadly to many ALD processes–opening exciting possibilities for next-generation device manufacturing and demonstrating how Chipmetrics enables cutting-edge research. Read the full paper at ACS Publications: https://lnkd.in/evy954zm #ALD #ALDep #Innovation #Nanotechnology #Semiconductors #ResearchAndDevelopment #PillarHall #TestedWithPillarHall #Chipmetrified

🔹 SEMICON Korea 2025 – Day 3: Featuring PillarHall® LHAR5🔹 It’s the final day of SEMICON Korea 2025, and today our PillarHall® LHAR5 advanced test chip for thin-film metrology in high aspect ratio (HAR) structures is on display!🚀 💡 Why PillarHall® LHAR5? ✅ Accurate conformality measurements in HAR structures ✅ Supports various analytical techniques ✅ Enables rapid process optimization If you’re at COEX, Seoul, stop by Advantec Korea booth C.244 to see PillarHall® LHAR5 in action and discuss with our CEO, Mikko Utriainen, how it supports the development of ferroelectric thin films for future semiconductor 3D devices. #SEMICONKorea2025 #Chipmetrified #PillarHall #ALDep #PillarHall #TestedWithPillarHall